Circuit board tsim yog ib txoj haujlwm tseem ceeb thiab siv sijhawm ntev, thiab txhua yam teeb meem uas tshwm sim yuav tsum muaj engineers los tshuaj xyuas tag nrho cov qauv tsim, kev sib txuas ntawm lub network, cov khoom siv los ntawm cov khoom siv. Nws tuaj yeem hais tias kev tsim hluav taws xob hauv Circuit Court yuav tsum muaj kev saib xyuas tsis muaj tsawg dua li chip tsim.
Ib qho txheej txheem tsim Circuit Court board muaj cov kauj ruam hauv qab no.
Thawj peb kauj ruam yuav siv sij hawm ntau tshaj, vim schematic checking yog ib tug txheej txheem ntawm phau ntawv. Xav txog SoC pawg thawj coj saib nrog 1000 lossis ntau dua kev sib txuas. Kev kuaj xyuas txhua lub xaim yog ib txoj haujlwm ntev thiab tedious. Qhov tseeb, nws yuav luag tsis tuaj yeem kuaj xyuas txhua lub xaim, uas tuaj yeem ua rau muaj teeb meem nrog lub rooj zaum kawg, xws li cov xov hlau tsis raug, cov nodes raug tshem tawm, thiab lwm yam.
Lub schematic capture theem feem ntau ntsib cov teeb meem hauv qab no.
● Underline yuam kev: xws li APLLVDD thiab APLL_VDD
● Cov teeb meem tseem ceeb: xws li VDDE thiab vdde
● Kev sau ntawv yuam kev
● Teeb meem luv luv
● Thiab ntau ntxiv
Txhawm rau zam qhov tsis raug, yuav tsum muaj ib txoj hauv kev los xyuas tag nrho cov schematic hauv ob peb feeb. Txoj kev no tuaj yeem siv tau nrog schematic simulation, uas tseem tsis tshua pom nyob rau hauv cov txheej txheem tsim board tam sim no. Lub schematic simulation tso cai rau qhov kawg tso tawm kom pom ntawm qhov xav tau ntawm cov nodes, yog li nws tuaj yeem kuaj xyuas txhua yam teeb meem kev sib txuas.
Qhov no tau piav qhia hauv qab no nrog rau qhov project piv txwv.
Xav txog ib daim duab thaiv ntawm ib lub rooj tsavxwm Circuit Court.
Daim duab 1
Nyob rau hauv ib tug complex board tsim, tus naj npawb ntawm kev sib txuas tuaj yeem ncav cuag ntau txhiab tus, thiab cov kev hloov pauv me me yuav nkim sij hawm ntau los xyuas.
Schematic simulation tsis tsuas yog txuag lub sij hawm tsim, tab sis kuj txhim kho qhov zoo ntawm lub rooj tsavxwm thiab ua kom cov efficiency ntawm tag nrho cov txheej txheem.
Ib qho cuab yeej raug kuaj xyuas (DUT) muaj qee cov cim hauv qab no.
Daim duab 2
Lub DUT yuav muaj ntau yam teeb liab tom qab qee qhov kev kho ua ntej thiab muaj ntau yam modules, xws li regulators, op-amps, thiab lwm yam, rau kev teeb tsa. Xav txog ib qho piv txwv ntawm cov khoom siv hluav taws xob tau txais los ntawm qhov ntsuas hluav taws xob.
Daim duab 3: Schematic ntawm cov qauv board.
Txhawm rau txheeb xyuas qhov kev sib raug zoo ntawm kev sib txuas thiab ua ib qho kev kuaj xyuas tag nrho, schematic simulation yog siv. Lub schematic simulation muaj schematic creation, testbench creation thiab simulation.
Thaum lub sij hawm lub testbench creation, ib tug excitation teeb liab yog muab rau cov tsim nyog inputs thiab ces cov tso zis tshwm sim raug soj ntsuam ntawm lub teeb liab point ntawm kev txaus siab.
Cov txheej txheem saum toj no tuaj yeem ua tiav los ntawm kev txuas cov kev sojntsuam mus rau cov nodes kom pom. Cov node voltages thiab waveforms tuaj yeem qhia tau tias qhov schematic muaj qhov ua yuam kev lossis tsis. Tag nrho cov teeb liab sib txuas tau raug kuaj xyuas.
Daim duab 4: Schematic testbed thiab simulation qhov tseem ceeb rau txhua qhov.
Cia peb saib ntawm ib feem ntawm daim duab saum toj no, qhov twg cov nodes thiab voltages probed pom meej.
Yog li nrog kev pab ntawm simulation, peb tuaj yeem saib ncaj qha cov txiaj ntsig thiab paub meej tias lub rooj tsav xwm schematic puas yog. Tsis tas li ntawd, kev tshawb nrhiav kev hloov pauv ntawm kev tsim qauv tuaj yeem ua tiav los ntawm kev ua tib zoo kho cov teeb liab excitation los yog cov khoom tseem ceeb. Yog li schematic simulation txuag ntau lub sij hawm rau board designers thiab checkers thiab tsub kom qhov yuav tsum tau ntawm tus tsim.
Cov tshooj no yog luam tawm ntawm lub network, yog tias muaj kev cuam tshuam, thov hu rau peb kom tshem tawm, ua tsaug.